In general, in the case where the processing speed and function of a large-scale integration (LSI) circuit are increased, the number of connection terminals of a semiconductor chip tends to correspondingly increase. A flip-chip mounting technique is employed as a connection technique, in which a solder bump formed on a semiconductor chip is utilized when the semiconductor chip faces downward. Examples of a material used to form the solder bump of a semiconductor chip include a tin (Sn)-silver (Ag) alloy, a tin-copper (Cu) alloy, and a tin-silver-copper alloy.
In the flip-chip mounting technique, a solder bump is generally formed on an electrode of a semiconductor chip as described above, while a solder alloy is supplied also onto an electrode of a circuit board on which the semiconductor chip is to be mounted. In general, the solder alloy to be supplied onto the electrode of the circuit board has a primary component that is the same as that of the solder bump that is formed on the semiconductor chip. Such an approach is employed for the following reasons: solder wettability is improved at the time of forming a solder bump connection, solder is supplied at a finer pitch in a sufficient amount, and high connection reliability is maintained.
In order to reduce production costs and provide a fine structure, a build-up substrate in which an organic material is used is employed as a circuit board. In the case where a semiconductor chip is bonded to a circuit board by using a material of the above solder bump, heat is applied at a high temperature higher than or equal to 250° C., for example. By virtue of such application of heat, the solder bump of the semiconductor chip is melted as well as that of the circuit board, and then the melted solder bumps are fused together. Subsequently, the resultant product is cooled to complete the bonding process.
In the cooling process, the state of a solder joint, which is formed as a result of fusing together the solder bumps, is changed from a liquid to a solid, and then the semiconductor chip is physically fixed to the circuit board. A circuit board that is produced by using an organic material exhibits a high thermal expansion coefficient that is in the range from 15 to 22 ppm/° C. In contrast, a semiconductor chip exhibits a low thermal expansion coefficient that is in the range from 3 to 5 ppm/° C. Therefore, during the cooling process to normal temperature (a process of changing a state of the solder from solidification to normal temperature), the semiconductor chip, circuit board, and solder joint are exposed to application of large stress due to differential thermal expansion. Such stress causes a significant problem of deterioration of quality, such as cracking of the semiconductor chip and damaging of the joint. Such a problem, which is caused by differential thermal expansion (stress) between the semiconductor chip and the circuit board, will come to have an increasingly significant influence in the future resulting from an increase in a device size due to the increased number of terminals of the semiconductor chip.
The usage of a low-melting-point solder has been suggested as an approach to overcome such a problem. Examples of the low-melting-point solder include Sn-58Bi solder having a melting point of 139° C. and Sn-52In solder having a melting point of 115° C. The usage of a low-melting-point solder serves as a technique for overcoming various problems due to the stress generated during the bonding process. However, usage of a low-melting-point solder in the semiconductor chips causes problems in that the solder is melted during a burn-in test of the semiconductor chip and in that the reliability with respect to electric properties may not be sufficiently evaluated.
The followings are reference documents:    [Document 1] Japanese Laid-open Patent Publication No. 10-41621    [Document 2] International Publication Pamphlet No. WO 94/027777    [Document 3] Japanese Laid-open Patent Publication No. 2007-208056